97精品伊人久久久大香线蕉,国产成人av电影在线观看第一页,国产精品99久久久久久人四虎,а√天堂中文官网在线,国产国产成人久久精品

 

The UM3202Q is ±8kV dual channel ESD-protected level translator provide the level shifting necessary to allow data transfer in a multi-voltage system. Externally applied voltages, V_CCB and V_CCA, set the logic levels on either side of the device. A low-voltage logic signal present on the V_CCA side of the device appears as a low-voltage logic signal on the V_CCB side of the device, and vice-versa. The UM3202Q bidi­rectional level translator utilizes a transmission-gate ­based design to allow data translation in either direction (V_CCA↔V_CCB) on any single data line. The UM3202Q accepts V_CCA from +1.65V to +3.6V and V_CCB from +2.3V to +5.5V, making it ideal for data transfer between low-voltage ASICs / PLDs and higher voltage systems.

The UM3202Q enters a three-state output mode to reduce supply current when output enable (OE) is low. The UM3202Q is designed so that the OE input circuit is supplied by V_CCA. ±8kV ESD protection on the V_CCB side for greater protection in applications that route sig­nals externally.

The UM3202Q is a dual level translator available in DFN8 1.70×1.35 package.

 

 

- Max Data Rates:

  24Mbps (Push Pull),

  2Mbps (Open Drain)                        

- Bidirectional Level Translation

- 1.65V to 3.6V on A Port and 2.3V to 5.5V on B Port (V_CCA≤V_CCB)

- ±8kV ESD Protection on B Port

- No Power-Supply Sequencing Required V_CCA or V_CCB can be Ramped First

- DFN8 Package